NVIDIA Announces Rubin R100 Ultra: 3nm CoWoS-L Architecture with 288GB HBM4 Memory

NVIDIA has officially unveiled the Rubin R100 Ultra computing platform on October 9, 2026, marking an aggressive generational leap in datacenter scale AI accelerators. Engineered to succeed the Blackwell B200 and Ultra systems, the Rubin architecture combines TSMC's enhanced 3nm process node (N3P) w...

The flagship R100 Ultra package integrates two reticle-limit compute dies interconnected via high-density 10 TB/s silicon interposers, accompanied by eight stacks of next-generation High Bandwidth Memory 4 (HBM4) offering 288GB of capacity and an unprecedented 22 TB/s of aggregat...

Achieving this level of compute density required NVIDIA and TSMC to deploy third-generation Chip-on-Wafer-on-Substrate (CoWoS-L) packaging technology. By moving beyond traditional microbumps to direct copper-to-copper hybrid bonding, interconnect parasitics and signal latencies between the compute chiplets have been sl...